The invention relates generally to silicon integrated circuit fabrication. In particular, the invention pertains to the device isolation processes involving the local oxidation of silicon.
Implementing electric circuits in an integrated process involves connecting isolated devices through specific electrical paths. In silicon ultra large scale integration, effective device isolation becomes increasingly important as device dimensions become smaller and packing density rises.
In conventional Metal-Oxide-Silicon (MOS) device fabrication, device isolation is often implemented by means of recessed or semi-recessed silicon dioxide (SiO2 or xe2x80x9coxidexe2x80x9d) regions in the non-active or field areas of the silicon substrate. This so-called Local Oxidation of Silicon (LOCOS) has become the most widely used isolation technology. In various forms, it remains the technique of choice for MOS device isolation.
A basic LOCOS process begins with the formation of a relatively thin (20-60 nm) pad-oxide layer over substantially an entire clean silicon (Si) wafer. Following the pad-oxide deposition, a silicon nitride (Si3N4 or xe2x80x9cnitridexe2x80x9d) layer of about 100-200 nm thick is deposited. Subsequently, the wafer is masked and the nitride/pad-oxide is etched to define the active regions. The exposed regions are the inactive or field regions wherein the field oxide is grown. Prior to oxide growth, optional dopant implants may be carried out to create channel-stops located beneath the field oxide. The field oxide is typically thermally grown at about atmospheric pressure by means of wet oxidation, at temperatures of about 1000xc2x0 C. for 2-4 hours, resulting in oxide thicknesses in the range of 0.3-1.0 xcexcm. Dry oxidation is usually not preferred because of the generally low oxidation rate which adds considerably to process throughput.
Even though the oxide grows substantially only within the regions defined by the masking nitride, some oxidant may diffuse laterally causing excess oxide to grow under the edges of the nitride mask, often forming a so-called xe2x80x9cbird""s beakxe2x80x9d effect. The bird""s beak presents several problems for device isolation. Modifications of the basic LOCOS isolation process have succeeded in reducing, the bird""s beak considerably.
During the growth of the field oxide, another phenomenon occurs that causes defects in the structure, which later become detrimental to the thin gate oxide. Kooi, et al. (J. Electrochem. Soc., vol. 123, pp. 1117, 1976), discovered that a thin layer of silicon nitride can form on the silicon surface at the pad-oxide/silicon interface as a result of the reaction of ammonia (NH3) and silicon. The ammonia is generated from the reaction between water vapor (H2O) and the masking nitride during the field-oxidation step. The ammonia diffuses through the pad oxide and reacts with the silicon substrate to form silicon nitride spots or ribbons, sometimes called the white ribbon effect. Subsequently, when the gate oxide is grown, the growth rate becomes impeded at the locations where the silicon nitride has formed. The gate oxide is thus thinner at these locations than elsewhere, causing low-voltage breakdown of the gate oxide. One common way to eliminate this problem is to grow a xe2x80x9csacrificialxe2x80x9d oxide layer after etching the masking nitride and pad-oxide layers. The sacrificial oxide is then removed before growing the final gate oxide. Clearly, however, the additional processes involved for eliminating the Kooi effect adds to the cost and complexity of ULSI fabrication.
It is an object of the present invention to provide a field isolation process which obviates the need for sacrificial oxide growth and removal to eliminate parasitic silicon nitride inclusions. It is a further object of the present invention to provide a field oxidation process which prevents the formation of silicon nitride inclusions at the silicon/silicon dioxide interface. It is yet another object of the present invention to provide a field oxidation process which eliminates the use of hydrogen-containing oxidants, thereby preventing silicon nitride formation concurrent with the field oxide formation and achieve the requisite field oxide growth.
In accordance with one aspect of the present invention, a field isolation process comprises growing a field oxide region on a semiconductor wafer by means of a hydrogen-free oxidant. Preferably the oxidant comprises substantially only oxygen and the field oxide process is preferably carried out at oxygen partial pressures greater than 10 atm and temperatures greater than about 900xc2x0 C.
In accordance with another aspect of the present invention, a method of growing a field oxide region on a semiconductor wafer comprises growing a first portion of the field oxide region by means of exposing a portion of the wafer to a first oxidizing ambient comprising water vapor. The field oxide region is completed by further exposing the portion of the wafer to a second oxidizing ambient comprising oxygen.
In accordance with yet another aspect of the present invention, a field isolation region on a semiconductor substrate is formed by a process comprised of exposing the field region of the semiconductor wafer to an oxidizing ambient comprising substantially only oxygen. More preferably, the isolation region is first exposed to an oxidizing ambient comprising at least in part water vapor, and subsequently exposed to the oxidizing ambient comprised of substantially only oxygen.
These as well as other objects and attributes of the present invention will become more fully apparent from the following description with reference to the accompanying drawings.